IHP 130nm BiCMOS Open Source PDK Logo
  • PDK Contents
  • Installation
  • Process Specifications
  • Layout Rules
  • Analog Design
    • 1. Analog/Mixed/RF flow
    • 2. Schematic capture with XSCHEM
    • 3. Schematic capture with QUCS-S
    • 4. Simulations using ngspice
    • 5. Simulations using Xyce
    • 6. Simulations using Gnucap
    • 7. Analog design using pygmid tool
    • 8. Analog design using KLayout tool
    • 9. Layout with GDSFactory
  • Digital Design
  • Chip Finishing
  • Physical & Design Verification
  • EM Simulation
  • Contribution
  • References
IHP 130nm BiCMOS Open Source PDK
  • Analog Design
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Analog Design

Analog Design

  • 1. Analog/Mixed/RF flow
  • 2. Schematic capture with XSCHEM
    • 2.1. XSCHEM installation and configuration
    • 2.2. XSCHEM symbol library
    • 2.3. XSCHEM testcases
    • 2.4. XSCHEM standard cell library
    • 2.5. XSCHEM IO cell library
  • 3. Schematic capture with QUCS-S
    • 3.1. Adding a new library and objects to Qucs-S via XML interface
    • 3.2. Using Qucs-S with IHP-Open-PDK
  • 4. Simulations using ngspice
    • 4.1. NGSPICE installation
    • 4.2. NGSPICE basic testcases
  • 5. Simulations using Xyce
    • 5.1. Xyce installation on Ubuntu LTS (22.04 and newer)
      • 5.1.1. Trilinos installation
      • 5.1.2. ADMS installation
      • 5.1.3. XYCE installation
  • 6. Simulations using Gnucap
    • 6.1. Introduction to Gnucap
    • 6.2. Gnucap and gnucap-modelgen-verilog installation on ubuntu 22.04 LTS
    • 6.3. Gnucap basic example
    • 6.4. Compiling a Verilog-A model to be used in a simulation
    • 6.5. References
  • 7. Analog design using pygmid tool
    • 7.1. Pygmid installation and configuration
    • 7.2. Device characterization using pygmid
    • 7.3. Basic usage of pygmid
  • 8. Analog design using KLayout tool
  • 9. Layout with GDSFactory
    • 9.1. Advantages over manual layout
    • 9.2. Getting started
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