IHP 130nm BiCMOS Open Source PDK
PDK Contents
Installation
Process Specifications
Layout Rules
Analog Design
Digital Design
Chip Finishing
Physical & Design Verification
Design Rule Checking (DRC)
Layout Versus Schematic (LVS) Checking
Parasitic Extraction (PEX)
With Magic
EM Simulation
Contribution
References
IHP 130nm BiCMOS Open Source PDK
Physical & Design Verification
Parasitics Extraction (PEX)
TODO: verification/pex/magic
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TODO: verification/pex/magic