IHP 130nm BiCMOS Open Source PDK
PDK Contents
Installation
Process Specifications
Layout Rules
Analog Design
Digital Design
Chip Finishing
Physical & Design Verification
Design Rule Checking (DRC)
1. Precheck (Minimal) DRC rules
2. Main DRC rules
3. Extra DRC rules
4. Klayout-DRC
5. TODO: verification/drc/magic
Layout Versus Schematic (LVS) Checking
Parasitic Extraction (PEX)
EM Simulation
Contribution
References
IHP 130nm BiCMOS Open Source PDK
Physical & Design Verification
DRC Rules
5.
TODO: verification/drc/magic
View page source
5.
TODO: verification/drc/magic