IHP 130nm BiCMOS Open Source PDK Logo
  • PDK Contents
  • Installation
  • Process Specifications
  • Layout Rules
  • Analog Design
  • Digital Design
  • Chip Finishing
  • Physical & Design Verification
    • Design Rule Checking (DRC)
      • 1. Precheck (Minimal) DRC rules
      • 2. Main DRC rules
      • 3. Extra DRC rules
      • 4. Klayout-DRC
        • 4.1. Folder Structure
        • 4.2. Prerequisites
        • 4.3. Installation
        • 4.4. Usage
        • 4.5. DRC Testing
      • 5. TODO: verification/drc/magic
    • Layout Versus Schematic (LVS) Checking
    • Parasitic Extraction (PEX)
  • EM Simulation
  • Contribution
  • References
IHP 130nm BiCMOS Open Source PDK
  • Physical & Design Verification
  • DRC Rules
  • 4. Klayout-DRC
  • View page source

4. Klayout-DRC๏ƒ

Tip

  • This section provides instructions for running DRC using the KLayout open-source tool.

  • For detailed steps and resources, please refer to DRC directory.

  • 4.1. Folder Structure
  • 4.2. Prerequisites
  • 4.3. Installation
  • 4.4. Usage
    • 4.4.1. CLI
    • 4.4.2. GUI
  • 4.5. DRC Testing
    • 4.5.1. Folder Structure
    • 4.5.2. Usage Guide
      • 4.5.2.1. Golden Results (For Developers Only)
      • 4.5.2.2. Regression Testing
        • 4.5.2.2.1. DRC Regression Outputs
        • 4.5.2.2.2. ๐Ÿงพ Output Regression Log
          • 4.5.2.2.2.1. ๐Ÿ“‹ Sample Regression Output
          • 4.5.2.2.2.2. ๐Ÿ“Š Explanation of Result Columns
          • 4.5.2.2.2.3. โœ… Summary Insights
Previous Next

© Copyright 2024, IHP PDK Authors.

Built with Sphinx using a theme provided by Read the Docs.